My "forever" project.. wavetable fpga synth.

[nikwal]

G'day folks.. I've started a project which involves me learning verilog and C and also how a synth works internally..
It's gonna take quite a while.
A few thoughts, I''ve choosen a wavetable size of 1024words for the moment and with the current development coreboard(altera cyclone iV) I can fit about 25waveforms in memory. should I have fewer wavetables with higher quality?

The first waves are obvoius, sine,triange,square,etc but the rest of them, do you have any wavetable that you can not live without in a synth?. I dont want to just steal the ideas from other synths.

It's based around a nco and today I managed implement a kind of pwm for all waveforms..
Here is a teaser with a small ackumulator so the frequency is not perfect..

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Project progress:

Made a "ring mod", trided both XOR and Multiplication.. ..Xor sounds like s***t hehe
Made oscillator hard sync.
Made more oscillators. got 4 of them now with pwm..
hehe..
To do, optimize, Code takes ca 4450LE's now(almost half) .
To do, write control mechanisms. and more tests..
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Rewrote the entire code to arrays and loops -style.. takes a little more space but easier to read and vary nr of channels..
also optimized pwm. four channels with pwm now takes 2700Le's (of 6000 in the smallest cyclone 4 fpga)..
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Further optimization on the way, trying to write time share code for pwm calc.. I 'think' it works now, but further testing has to be done, if it works I can add a LOT of oscillators with very few logical elements. I created a 2 bit counter and I load values from different channels depending on value. Down to 1126Le's now.. A new channel should now take very little amount of resources.
ALso added proper code for oscillator hard sync.
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Harder than I thought to program ADSR generator. but getting there. got a working prototype.
Problem was I tried to do it "proper" way first with proper edge detectors. (always @(posedge ...) it sucks..
Seems like bit-banging is the way to go, less code and works better.. if (!res && !gate) gate=1;..
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Optimized time-control for adsr and also added different modes.. normal is, release starts where you release the key, be high or low volume. alternative mode is that it actually always follow the adsr curve.
Although the adsr code is like 14lines(quite a lot) it does'nt take much LE space at all in the fpga..
Here is some actual code before any paramter arrays is added and such.. :
http://nikwal.in-earth.org/adsrBETA.txt
Also added non linearity to the adsr code.. hmm optional or not, dont know yet....
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Wrote mux-code for ram, to be able to read same waveform multiple times. It can be optimized because its already dual port in hardware,but there is not much point yet to write it dual port since I can switch about a maximum of 500 to a 1000 waves before it becomes a problem.
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I can now control if a waveform is to be placed in "ram" or in "Logical elements", for example basic triangle and squarewave take almost no space as logical elements. This means more waves. Thankyou quartus for optimizing the crud out of my waves ..
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Made code for two's complement conversion, since waveforms are stored as 0-65535 data with 32768 as 0 and it would be a pita to convert them now. Now the signal level is actually in the middle as it should. volume change works properly too.
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octave/note to tuningword translation done
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SPI dac output done! finally got rid of the 2r2 dac..
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To do
waveform crossfade?
ringmod?
waveform fm and/or am?
portamento?


updated151210

[Stab Frenzy]

I like formants, hollow bell type sounds, anything that's somewhat hard to get from a vanilla analogue oscillator. It could also be cool to make a wavetable of a folded sine wave with fold on the X axis and bias on the Y.

Cool project, keep us updated!

[nikwal]

Hmm I like thoose as well and also some "human voice" kind of waves.. Fold, cool ide hmm that would maybe be worth looking into doing in hardware if it's not using too many LE's. Right now I'm prototyping the code on a max II board and so far it's just under 1000 LE's including the wave(which is not located in ram om this board). The big problem is as usual not using any divisions.Atm I can not getting around using a few divisions that can not be simply rotated. Might have to do my own division subroutine later to save space. The other board have 10000LE's
edit: learning how to do "pingpong" code in verilog, its bloody not like qbasic really hehe

[elmosexwhistle]

I really love some of the ones in the ensoniq VFX.

Would you like me to send an mp3 showing off a couple of them?

[abruzzi]

A bit off topic, I can't imagine a need to store a square or pulse wave as a lookup table (unless you want to do a non standard square.) A simple formula: if (phase<512) { return 0; } else {return 65535;). For a rising sawtooth: return phase * 64;. If you have a FPU, sine can be done (without FPU, the formula is a lot of cycles.) Triangle can be done by shifting, scaling, and applying absolute value to a sawtooth.

[nikwal]

I really love some of the ones in the ensoniq VFX.
Would you like me to send an mp3 showing off a couple of them?

Actually that would be nice.. i've had some ensoniq's but not had a chance to listen to the VFX..

A bit off topic, I can't imagine a need to store a square or pulse wave as a lookup table (unless you want to do a non standard square.) A simple formula: if (phase<512) { return 0; } else {return 65535;). For a rising sawtooth: return phase * 64;. If you have a FPU, sine can be done (without FPU, the formula is a lot of cycles.) Triangle can be done by shifting, scaling, and applying absolute value to a sawtooth.

Yes actually i was thinking in that line earlier. I'm not yet sure how that would work with beeing able to fade between multiple waveforms while doing "pwm". Some of thoose tricks is probably possible to doin fpga though, I might try it. . sawtooth is probably not needed at all due to beeng able to pwm the triangle hmmm if we dont want a very strange sawtooth hmm. Sine could be done with folding. But I also do want to use as few LE's as possible,got heap loads of cycles but not much Le's
edit: HMM! in verilog ,if i store the wave in LE's instead of ram, the compiler will most probably compress it very much, automatically..

[Stab Frenzy]

A bit off topic, I can't imagine a need to store a square or pulse wave as a lookup table (unless you want to do a non standard square.) A simple formula: if (phase<512) { return 0; } else {return 65535;).

I don't think there's been a perfect square that's ever come out of a synth oscillator ever. You don't want perfect, perfect is boring and sounds bad.

[seamonkey]

A bit off topic, I can't imagine a need to store a square or pulse wave as a lookup table (unless you want to do a non standard square.) A simple formula: if (phase<512) { return 0; } else {return 65535;).

I don't think there's been a perfect square that's ever come out of a synth oscillator ever. You don't want perfect, perfect is boring and sounds bad.

[Ashe37]

A bit off topic, I can't imagine a need to store a square or pulse wave as a lookup table (unless you want to do a non standard square.) A simple formula: if (phase<512) { return 0; } else {return 65535;).

I don't think there's been a perfect square that's ever come out of a synth oscillator ever. You don't want perfect, perfect is boring and sounds bad.

A perfect square wave is probably only useful as a test pattern.

but seriously, I can tell you why to do a pulse wave as a wavetable: PWM on a sample-based synth.

[nikwal]

I think you are right. So i seached and found(wiih, happy!) a bunch of basic waveforms from a bunch of different ones like pro one, arp2600,ms20,dsi and a few more. At some point I might have to go out and sample my own but this'll go like 95% of the way. Also ordered a cpu board and a whole bunch of components for the filters and vca's (Dont want to say which ones since it's a very new angle on an old concept,really sorry, also I dont know yet if it's gonna sound good). Yet to decide what opamps to build around though, probably going to have to try a few of them, I'm thinking lm4562 for starters... I'm hoping an atmega128 will work since i know them quite well from different other projecs, I'll probaly try to put as much as I can in fpga though.. ...ALSO In a few days vacation starts Note to self: "dont sit all the time behind quartus, go outside and drink lots a beer too!"..


I made a second dds oscillator and the LE count is 2400(of 6000 or 10000) then figured out how tasks and functions work and now the LE count is down to 1200 . I kind of like the sound now, even though they are "perfect" waveforms. Adding a 3rd and 4'th oscillator should be no problem.. here mixing "sine" and square.


I wonder if there is an easy way to reduce the size of the addressbus to the memory to simulate a lower sample rate hmm.. Now might have to look at ring mod and such..

[Stab Frenzy]

One thing that could be worth trying is instead of making your wavetables by thinking of them in the amplitude/time domain, consider building them additively in the amplitude/frequency domain and then convert them to a single cycle amplitude/time wave. Much more interesting harmonic results in that method I think. It's also interesting seeing the different examples of various synth's 'saw' 'square' etc waveforms in the amplitude/frequency domain, it helps you see exactly why they sound different more than just looking at the waveform. Ears don't hear waveforms, they hear different frequencies at different amplitudes so it makes sense to observe sounds in the same way.

[synthroom]

Whatever you do, make sure you use a Ruben's flame tube like the PPG guys did to "digitize" the sounds.

[Alphacode]

The ones that sounds like drones

[nikwal]

Been a lot of other work since vaca. But now I'm on it again a little ..Just when i was about to write the frequency table to dds tuningword conversion I realized that if the frequencies of the oscillators are exacly the same , they would eventually "null" themselves out, I think this bug has been found now.. And i realize now I have to do a better timing mechanism for adsr.
Also been planninng d/a routines.. spi would be the smart choice but I'd like to do something funky like a simple double , calibrated r2r.. experiments has shown it should work, not as good as spi but for now at least..
Been recalculating all waveforms to twos complement and rewriting code to accept it..

I'm no expert but I'm going to share some verilog code with you that dumps data out to a spi dac..



//reg [4:0] dacbit; //bitcounter
//reg [15:0] audioout; //data to be sounded
//wire dacc; //clock
//wire dacd; //data
//wire dacs; //sync

always @ (posedge clk) dacc=dacc+1; //divide system clock for max 25Mhz (wire dacc=clk /50Mhz)
always @ (posedge dacc)
begin
reg [15:0] audioo; //temp variabel för data
if (dacbit==0) dacs<=0;begin audioo=audioout; end //pull synk low, and transfer audiodata
if (dacbit==1) dacd<=0; //dump data ,first a long row of 0
for (int j = 8 ; j < 23; j++) begin
if (dacbit==j) dacd<=audioo[23-j]; //audiodata here
end
if (dacbit==24) dacs<=1; //pull sync high again
dacbit<=dacbit+1;
if (dacbit==25) dacbit<=0; //next byte
end

http://nikwal.in-earth.org/15khz_quality.jpg <---- not bad for that frequency? looks almost totally smooth..
http://nikwal.in-earth.org/nco1.jpg
http://nikwal.in-earth.org/nco2.jpg

..........
Had a problem with the new way of calculating pwm, not with the calculations themselves but the frequency did not end up correctly.. so what happened was, I bumped up the frequency from 50Mhz to 450Mhz with PLL, took some time to figure out how to use the pll. The logic itself is still going the same speed but I can clock some things faster that needs to.. so now I'm down to 1hz error at 1% pwm at 10khz, which works for me.. Because of this , I had to break down some of the code that I now have to build up again around the new way of working with the dds code..
Signal quality seems stupidly good though.. It's a bit strange, you cant really debug this code in an ordinary "fpga" simulator kind of way, you have to connect it to a speaker and LISTEN CAREFULLY for artifacts and blips for like three minutes at least, while debugging the code..

[nikwal]

since this is not going to be a midi only thing, i decided it was time to make a keybed decoder..
it's needed to be able to continue programming oscillator stuff..

here im putting out note and velocity data for 4voices, doing only "last prio" for now..
also created gate and strobe signals to trig envelopes..
if i get the decoder to work I might soon be able to actually PLAY on it for the first time..